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| author | Kenneth Graunke | 2014-03-26 06:52:03 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-04-01 22:58:16 +0200 |
| commit | 180b813ced1d1341c07f25e5195228100921d327 (patch) | |
| tree | 8fc2143e31c198caba3eb9beea276b5c13fa31b9 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Enable command parsing by default (diff) | |
| download | kernel-qcow2-linux-180b813ced1d1341c07f25e5195228100921d327.tar.gz kernel-qcow2-linux-180b813ced1d1341c07f25e5195228100921d327.tar.xz kernel-qcow2-linux-180b813ced1d1341c07f25e5195228100921d327.zip | |
drm/i915: Add OACONTROL to the command parser register whitelist.
Mesa needs to be able to write OACONTROL in order to expose the
Observability Architecture's performance counters via OpenGL.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
[danvet: Add comment that this is just a temporary work-around and
that we need to check more things before we can allow OACONTROL writes
for real everywhere.]
[danvet 2: Squash in fixup to avoid a DRM_ERROR due to unsorted reg
list, spotted by Jani.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index bd7636604f7e..1f927a53fe19 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -427,6 +427,8 @@ /* There are the 4 64-bit counter registers, one for each stream output */ #define GEN7_SO_NUM_PRIMS_WRITTEN(n) (0x5200 + (n) * 8) +#define OACONTROL 0x2360 + #define _GEN7_PIPEA_DE_LOAD_SL 0x70068 #define _GEN7_PIPEB_DE_LOAD_SL 0x71068 #define GEN7_PIPE_DE_LOAD_SL(pipe) _PIPE(pipe, \ |