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author | Arun Siluvery | 2016-01-21 22:43:49 +0100 |
---|---|---|
committer | Daniel Vetter | 2016-01-25 16:48:22 +0100 |
commit | 3669ab6191b24ee800a5f78d3748b7d96df12115 (patch) | |
tree | f57bf44d6d37e2b66e88559cc7c793011db29b03 /drivers/gpu/drm/i915/i915_reg.h | |
parent | drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist (diff) | |
download | kernel-qcow2-linux-3669ab6191b24ee800a5f78d3748b7d96df12115.tar.gz kernel-qcow2-linux-3669ab6191b24ee800a5f78d3748b7d96df12115.tar.xz kernel-qcow2-linux-3669ab6191b24ee800a5f78d3748b7d96df12115.zip |
drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist
Required for WaAllowUMDToModifyHDCChicken1:skl,bxt
This register is added to HW whitelist to support WA required for future
enabling of pre-emptive command execution, WA implementation will be in
userspace and it cannot program this register if it is not on HW whitelist.
v2: explain purpose of changes (Chris)
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1453412634-29238-4-git-send-email-arun.siluvery@linux.intel.com
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 511732ea0138..ed887cfc47f1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -6045,6 +6045,8 @@ enum skl_disp_power_wells { #define HDC_FORCE_NON_COHERENT (1<<4) #define HDC_BARRIER_PERFORMANCE_DISABLE (1<<10) +#define GEN8_HDC_CHICKEN1 _MMIO(0x7304) + /* GEN9 chicken */ #define SLICE_ECO_CHICKEN0 _MMIO(0x7308) #define PIXEL_MASK_CAMMING_DISABLE (1 << 14) |