diff options
| author | Manasi Navare | 2017-09-14 20:31:39 +0200 |
|---|---|---|
| committer | Rodrigo Vivi | 2017-09-14 21:32:25 +0200 |
| commit | 442aa277c066cec6cfe8508b3edbdda022b10568 (patch) | |
| tree | 18ce2d8b2b8b8eaa932de4f5bceb181fd334ec16 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Gen3 HWSTAM is actually 32 bits (diff) | |
| download | kernel-qcow2-linux-442aa277c066cec6cfe8508b3edbdda022b10568.tar.gz kernel-qcow2-linux-442aa277c066cec6cfe8508b3edbdda022b10568.tar.xz kernel-qcow2-linux-442aa277c066cec6cfe8508b3edbdda022b10568.zip | |
drm/i915/cnl: Change the macro name to DPLL_CFGCR0_DCO_FRACTION_SHIFT
No functional changes. Only change the macro from
"DPLL_CFGCR0_DC0_FRAC_SHIFT to DPLL_CFGCR0_DCO_FRACTION_SHIFT
to be consistent with DPLL_CFGCR0_DCO_FRACTION_MASK
and DPLL_CFGCR0_DCO_FRACTION
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1505413899-30876-1-git-send-email-manasi.d.navare@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0befefec7327..94b40a469afd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8599,7 +8599,7 @@ enum skl_power_gate { #define DPLL_CFGCR0_LINK_RATE_3240 (6 << 25) #define DPLL_CFGCR0_LINK_RATE_4050 (7 << 25) #define DPLL_CFGCR0_DCO_FRACTION_MASK (0x7fff << 10) -#define DPLL_CFGCR0_DCO_FRAC_SHIFT (10) +#define DPLL_CFGCR0_DCO_FRACTION_SHIFT (10) #define DPLL_CFGCR0_DCO_FRACTION(x) ((x) << 10) #define DPLL_CFGCR0_DCO_INTEGER_MASK (0x3ff) #define CNL_DPLL_CFGCR0(pll) _MMIO_PLL(pll, _CNL_DPLL0_CFGCR0, _CNL_DPLL1_CFGCR0) |