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| author | Michał Winiarski | 2017-10-03 22:34:46 +0200 |
|---|---|---|
| committer | Chris Wilson | 2017-10-04 18:52:45 +0200 |
| commit | 5152defe4a53ad15e6d96c422440152302c8abd7 (patch) | |
| tree | 4682f18a5f68d054f0e1028c65185fec41bafc12 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/preempt: Fix WaEnablePreemptionGranularityControlByUMD (diff) | |
| download | kernel-qcow2-linux-5152defe4a53ad15e6d96c422440152302c8abd7.tar.gz kernel-qcow2-linux-5152defe4a53ad15e6d96c422440152302c8abd7.tar.xz kernel-qcow2-linux-5152defe4a53ad15e6d96c422440152302c8abd7.zip | |
drm/i915/preempt: Default to disabled mid-command preemption levels
Supporting fine-granularity preemption levels may require changes in
userspace batch buffer programming. Therefore, we need to fallback to
safe default values, rather that use hardware defaults. Userspace is
still able to enable fine-granularity, since we're whitelisting the
register controlling it in WaEnablePreemptionGranularityControlByUMD.
v2: Extend w/a to cover Cannonlake
v3: Fix commentary to include both fake w/a names.
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171003203453.15692-2-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 39ad9327e2a0..e7dba5539b11 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -7003,6 +7003,12 @@ enum { #define GEN9_CS_DEBUG_MODE1 _MMIO(0x20ec) #define GEN9_CTX_PREEMPT_REG _MMIO(0x2248) #define GEN8_CS_CHICKEN1 _MMIO(0x2580) +#define GEN9_PREEMPT_3D_OBJECT_LEVEL (1<<0) +#define GEN9_PREEMPT_GPGPU_LEVEL(hi, lo) (((hi) << 2) | ((lo) << 1)) +#define GEN9_PREEMPT_GPGPU_MID_THREAD_LEVEL GEN9_PREEMPT_GPGPU_LEVEL(0, 0) +#define GEN9_PREEMPT_GPGPU_THREAD_GROUP_LEVEL GEN9_PREEMPT_GPGPU_LEVEL(0, 1) +#define GEN9_PREEMPT_GPGPU_COMMAND_LEVEL GEN9_PREEMPT_GPGPU_LEVEL(1, 0) +#define GEN9_PREEMPT_GPGPU_LEVEL_MASK GEN9_PREEMPT_GPGPU_LEVEL(1, 1) /* GEN7 chicken */ #define GEN7_COMMON_SLICE_CHICKEN1 _MMIO(0x7010) |