summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/i915/i915_reg.h
diff options
context:
space:
mode:
authorVille Syrjälä2013-06-06 12:09:32 +0200
committerDaniel Vetter2013-06-06 13:41:42 +0200
commit5434fd926d1e4de5d82fcbd4e7e4698cc6575bdb (patch)
treeb1c5389cc9a976de34e06c3ef4c5fa1e28deadcb /drivers/gpu/drm/i915/i915_reg.h
parentdrm/i915: add ibx_irq_preinstall (diff)
downloadkernel-qcow2-linux-5434fd926d1e4de5d82fcbd4e7e4698cc6575bdb.tar.gz
kernel-qcow2-linux-5434fd926d1e4de5d82fcbd4e7e4698cc6575bdb.tar.xz
kernel-qcow2-linux-5434fd926d1e4de5d82fcbd4e7e4698cc6575bdb.zip
Revert "drm/i915: Include display_mmio_offset in sequencer index/data registers"
We use port I/O for VGA register access, so adding display_mmio_offset is just wrong. This reverts commit 56a12a509296c87d6f149be86c6694d312b21d35. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h10
1 files changed, 2 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 47a9de0d51cc..ff9f71af9347 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -147,15 +147,9 @@
#define VGA_MSR_MEM_EN (1<<1)
#define VGA_MSR_CGA_MODE (1<<0)
-/*
- * SR01 is the only VGA register touched on non-UMS setups.
- * VLV doesn't do UMS, so the sequencer index/data registers
- * are the only VGA registers which need to include
- * display_mmio_offset.
- */
-#define VGA_SR_INDEX (dev_priv->info->display_mmio_offset + 0x3c4)
+#define VGA_SR_INDEX 0x3c4
#define SR01 1
-#define VGA_SR_DATA (dev_priv->info->display_mmio_offset + 0x3c5)
+#define VGA_SR_DATA 0x3c5
#define VGA_AR_INDEX 0x3c0
#define VGA_AR_VID_EN (1<<5)