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| author | Imre Deak | 2014-02-10 17:42:47 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-02-12 18:52:57 +0100 |
| commit | 755e901964a979ea0e1a823ac8c5d477fe8fd108 (patch) | |
| tree | 525609560626a652a84256c27747854a1a0a8d95 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Short-circuit no-op vga_set_state() (diff) | |
| download | kernel-qcow2-linux-755e901964a979ea0e1a823ac8c5d477fe8fd108.tar.gz kernel-qcow2-linux-755e901964a979ea0e1a823ac8c5d477fe8fd108.tar.xz kernel-qcow2-linux-755e901964a979ea0e1a823ac8c5d477fe8fd108.zip | |
drm/i915: pass status instead of enable flags to i915_enable_pipestat
There isn't any PSR interrupt enable bit for pipe A, so we couldn't
enable it through the current API. Passing the corresponding status bits
solves this and also makes the mapping between enable and status bits
simpler on VLV (addressed in an upcoming patch).
Except of checking for invalid status bit arguments, no functional
change.
v2: split out the low level parts of i915_enable_pipestat accepting
separate enabled and status masks, to make the non-standard mapping
between those masks stand out more (added in the next patch)
(Jesse,Daniel)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1a66fc58c170..6f021ff6106d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3277,6 +3277,9 @@ #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) #define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) +#define PIPESTAT_INT_ENABLE_MASK 0x7fff0000 +#define PIPESTAT_INT_STATUS_MASK 0x0000ffff + #define PIPE_A_OFFSET 0x70000 #define PIPE_B_OFFSET 0x71000 #define PIPE_C_OFFSET 0x72000 |