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| author | Damien Lespiau | 2014-11-04 18:06:44 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-11-07 18:42:05 +0100 |
| commit | 8211bd5bdf5e1cf860616138ed71600a24a827bd (patch) | |
| tree | fc3b98f73427605c83c9cba563d6712878539197 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/skl: Allocate DDB portions for display planes (diff) | |
| download | kernel-qcow2-linux-8211bd5bdf5e1cf860616138ed71600a24a827bd.tar.gz kernel-qcow2-linux-8211bd5bdf5e1cf860616138ed71600a24a827bd.tar.xz kernel-qcow2-linux-8211bd5bdf5e1cf860616138ed71600a24a827bd.zip | |
drm/i915/skl: Program the DDB allocation
v2: Adapt to the planes/cursor split
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index ccbaeb35d695..ea22e09bd4c5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4696,6 +4696,8 @@ enum punit_power_well { #define _PLANE_KEYMSK_2_A 0x70298 #define _PLANE_KEYMAX_1_A 0x701a0 #define _PLANE_KEYMAX_2_A 0x702a0 +#define _PLANE_BUF_CFG_1_A 0x7027c +#define _PLANE_BUF_CFG_2_A 0x7037c #define _PLANE_CTL_1_B 0x71180 #define _PLANE_CTL_2_B 0x71280 @@ -4773,6 +4775,20 @@ enum punit_power_well { #define PLANE_KEYMAX(pipe, plane) \ _PLANE(plane, _PLANE_KEYMAX_1(pipe), _PLANE_KEYMAX_2(pipe)) +#define _PLANE_BUF_CFG_1_B 0x7127c +#define _PLANE_BUF_CFG_2_B 0x7137c +#define _PLANE_BUF_CFG_1(pipe) \ + _PIPE(pipe, _PLANE_BUF_CFG_1_A, _PLANE_BUF_CFG_1_B) +#define _PLANE_BUF_CFG_2(pipe) \ + _PIPE(pipe, _PLANE_BUF_CFG_2_A, _PLANE_BUF_CFG_2_B) +#define PLANE_BUF_CFG(pipe, plane) \ + _PLANE(plane, _PLANE_BUF_CFG_1(pipe), _PLANE_BUF_CFG_2(pipe)) + +/* SKL new cursor registers */ +#define _CUR_BUF_CFG_A 0x7017c +#define _CUR_BUF_CFG_B 0x7117c +#define CUR_BUF_CFG(pipe) _PIPE(pipe, _CUR_BUF_CFG_A, _CUR_BUF_CFG_B) + /* VBIOS regs */ #define VGACNTRL 0x71400 # define VGA_DISP_DISABLE (1 << 31) |