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| author | Daniel Vetter | 2013-05-03 11:49:46 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2013-05-06 11:25:25 +0200 |
| commit | ab9412ba06484cdfd82bdb748689024efe2221fe (patch) | |
| tree | d3d57966401fb9c0cad7de115c48bb1582d2733c /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: fix up adjusted_mode tracking for interlaced modes (diff) | |
| download | kernel-qcow2-linux-ab9412ba06484cdfd82bdb748689024efe2221fe.tar.gz kernel-qcow2-linux-ab9412ba06484cdfd82bdb748689024efe2221fe.tar.xz kernel-qcow2-linux-ab9412ba06484cdfd82bdb748689024efe2221fe.zip | |
drm/i915: s/TRANSCONF/PCH_TRANSCONF/
Every time I read hsw code I get completely confused about this. So
call it what it is more explicitly.
Also, add an LPT_TRANSCONF for the pch transcoder A and use it in
lpt-only code, to really unconfuse me.
v2: s/plane/pipe/ in the TRANSCONF #define (Paulo).
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index aec569f13186..fd5601998982 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4060,9 +4060,10 @@ #define TRANSDPLINK_M2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_M2, _TRANSB_DP_LINK_M2) #define TRANSDPLINK_N2(pipe) _PIPE(pipe, _TRANSA_DP_LINK_N2, _TRANSB_DP_LINK_N2) -#define _TRANSACONF 0xf0008 -#define _TRANSBCONF 0xf1008 -#define TRANSCONF(plane) _PIPE(plane, _TRANSACONF, _TRANSBCONF) +#define _PCH_TRANSACONF 0xf0008 +#define _PCH_TRANSBCONF 0xf1008 +#define PCH_TRANSCONF(pipe) _PIPE(pipe, _PCH_TRANSACONF, _PCH_TRANSBCONF) +#define LPT_TRANSCONF _PCH_TRANSACONF /* lpt has only one transcoder */ #define TRANS_DISABLE (0<<31) #define TRANS_ENABLE (1<<31) #define TRANS_STATE_MASK (1<<30) |