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| author | Ville Syrjälä | 2015-10-29 20:25:59 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2015-11-10 15:23:42 +0100 |
| commit | b377e0df1118e63873f3fd5182ebd6c918f2805c (patch) | |
| tree | e67791386a6e91c3ad6aaa08be3d72462dcde51c /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Hide underruns from eDP PLL and port enable on ILK (diff) | |
| download | kernel-qcow2-linux-b377e0df1118e63873f3fd5182ebd6c918f2805c.tar.gz kernel-qcow2-linux-b377e0df1118e63873f3fd5182ebd6c918f2805c.tar.xz kernel-qcow2-linux-b377e0df1118e63873f3fd5182ebd6c918f2805c.zip | |
drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/
The DP link frequency is 162MHz, not 160MHz. Rename the ILK eDP PLL
defines to match.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1446146763-31821-11-git-send-email-ville.syrjala@linux.intel.com
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2183a6e1f134..3b24993319dd 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4199,7 +4199,7 @@ enum skl_disp_power_wells { /* eDP */ #define DP_PLL_FREQ_270MHZ (0 << 16) -#define DP_PLL_FREQ_160MHZ (1 << 16) +#define DP_PLL_FREQ_162MHZ (1 << 16) #define DP_PLL_FREQ_MASK (3 << 16) /* locked once port is enabled */ |