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| author | Zhao Yakui | 2010-06-12 08:32:27 +0200 |
|---|---|---|
| committer | Eric Anholt | 2010-08-02 04:03:44 +0200 |
| commit | b52eb4dcab23fe0c52a437276258e0afcf913ef5 (patch) | |
| tree | 72391fa2b4cf33155e078ab6467245403fbd3d18 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Calculate cursor watermark under non-SR state for Ironlake (diff) | |
| download | kernel-qcow2-linux-b52eb4dcab23fe0c52a437276258e0afcf913ef5.tar.gz kernel-qcow2-linux-b52eb4dcab23fe0c52a437276258e0afcf913ef5.tar.xz kernel-qcow2-linux-b52eb4dcab23fe0c52a437276258e0afcf913ef5.zip | |
drm/i915: Add frame buffer compression support on Ironlake mobile
About 0.2W power can be saved on one HP laptop.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index d0ccfa0c72de..e2a6f687d8b0 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -530,6 +530,21 @@ #define DPFC_CHICKEN 0x3224 #define DPFC_HT_MODIFY (1<<31) +/* Framebuffer compression for Ironlake */ +#define ILK_DPFC_CB_BASE 0x43200 +#define ILK_DPFC_CONTROL 0x43208 +/* The bit 28-8 is reserved */ +#define DPFC_RESERVED (0x1FFFFF00) +#define ILK_DPFC_RECOMP_CTL 0x4320c +#define ILK_DPFC_STATUS 0x43210 +#define ILK_DPFC_FENCE_YOFF 0x43218 +#define ILK_DPFC_CHICKEN 0x43224 +#define ILK_FBC_RT_BASE 0x2128 +#define ILK_FBC_RT_VALID (1<<0) + +#define ILK_DISPLAY_CHICKEN1 0x42000 +#define ILK_FBCQ_DIS (1<<22) + /* * GPIO regs */ @@ -2491,6 +2506,10 @@ #define ILK_VSDPFD_FULL (1<<21) #define ILK_DSPCLK_GATE 0x42020 #define ILK_DPARB_CLK_GATE (1<<5) +/* According to spec this bit 7/8/9 of 0x42020 should be set to enable FBC */ +#define ILK_CLK_FBC (1<<7) +#define ILK_DPFC_DIS1 (1<<8) +#define ILK_DPFC_DIS2 (1<<9) #define DISP_ARB_CTL 0x45000 #define DISP_TILE_SURFACE_SWIZZLING (1<<13) |