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| author | Daniel Vetter | 2012-04-11 20:42:39 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2012-04-17 11:19:56 +0200 |
| commit | be901a5a1bdb13c3390110d4b9780c03018d96a0 (patch) | |
| tree | e4824cc5d40abaa54a6d3944e7465e0cdfbc1293 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: implement a media hang w/a (diff) | |
| download | kernel-qcow2-linux-be901a5a1bdb13c3390110d4b9780c03018d96a0.tar.gz kernel-qcow2-linux-be901a5a1bdb13c3390110d4b9780c03018d96a0.tar.xz kernel-qcow2-linux-be901a5a1bdb13c3390110d4b9780c03018d96a0.zip | |
drm/i915: set w/a bit for snb pagefaults
Bspec says that we need to set this: vol1c.3 "Blitter Command
Streamer", Section 1.1.2.1 "GAB_CTL_REG - GAB Unit Control Register".
We don't really rely on pagefaults, but who knows what this all
affects.
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1124e4f594f5..d875fb19f62d 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -127,6 +127,9 @@ #define ECOCHK_PPGTT_CACHE64B (0x3<<3) #define ECOCHK_PPGTT_CACHE4B (0x0<<3) +#define GAB_CTL 0x24000 +#define GAB_CTL_CONT_AFTER_PAGEFAULT (1<<8) + /* VGA stuff */ #define VGA_ST01_MDA 0x3ba |