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| author | Oscar Mateo | 2018-05-08 23:29:26 +0200 |
|---|---|---|
| committer | Mika Kuoppala | 2018-05-11 14:55:13 +0200 |
| commit | d41bab687999793d7331b7b8906dca7e1aeb64c7 (patch) | |
| tree | 301c718d03fc90bef6a6aaf82a511bada184ff2d /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/icl: WaGAPZPriorityScheme (diff) | |
| download | kernel-qcow2-linux-d41bab687999793d7331b7b8906dca7e1aeb64c7.tar.gz kernel-qcow2-linux-d41bab687999793d7331b7b8906dca7e1aeb64c7.tar.xz kernel-qcow2-linux-d41bab687999793d7331b7b8906dca7e1aeb64c7.zip | |
drm/i915/icl: WaL3BankAddressHashing
Revert to an L3 non-hash model, for performance reasons.
v2:
- Place the WA name above the actual change
- Improve the register naming
v3:
- Rebased
- Renamed to Wa_1604223664
v4: Rebased on top of the WA refactoring
v5:
- Added References (Mika)
- Fixed wrong mask and value (Mika)
- Do not apply together with another WA for the same
register (not worth the hassle)
v6:
- Rebased
- C, not lisp (Chris)
References: HSDES#1604223664
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/1525814984-20039-5-git-send-email-oscar.mateo@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c9c2ad5f5844..81f1a8c7c0f5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -8253,6 +8253,12 @@ enum { #define GEN8_GARBCNTL _MMIO(0xB004) #define GEN9_GAPS_TSV_CREDIT_DISABLE (1 << 7) #define GEN11_ARBITRATION_PRIO_ORDER_MASK (0x3f << 22) +#define GEN11_HASH_CTRL_EXCL_MASK (0x7f << 0) +#define GEN11_HASH_CTRL_EXCL_BIT0 (1 << 0) + +#define GEN11_GLBLINVL _MMIO(0xB404) +#define GEN11_BANK_HASH_ADDR_EXCL_MASK (0x7f << 5) +#define GEN11_BANK_HASH_ADDR_EXCL_BIT0 (1 << 5) #define GEN10_DFR_RATIO_EN_AND_CHICKEN _MMIO(0x9550) #define DFR_DISABLE (1 << 9) |