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| author | Animesh Manna | 2018-07-25 02:28:11 +0200 |
|---|---|---|
| committer | Paulo Zanoni | 2018-07-25 22:35:09 +0200 |
| commit | db7295c2c4efb56efab7f6fe0fc3c646d200630a (patch) | |
| tree | 6ef9591f7a9842ffe14c8a610c4b91953287ab58 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/icl: store the port type for TC ports (diff) | |
| download | kernel-qcow2-linux-db7295c2c4efb56efab7f6fe0fc3c646d200630a.tar.gz kernel-qcow2-linux-db7295c2c4efb56efab7f6fe0fc3c646d200630a.tar.xz kernel-qcow2-linux-db7295c2c4efb56efab7f6fe0fc3c646d200630a.zip | |
drm/i915/icl: Update FIA supported lane count for hpd.
In ICL, Flexible IO Adapter (FIA) muxes data and clocks of USB 3.1,
tbt and display controller. In DP alt mode FIA configure the
number of lanes and will be used apart from DPCD read to calculate max
available lanes for DP enablement.
v2 (from Paulo): Simple rebase.
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com> (v1).
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
[Paulo: significant rewrite of the patch.]
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180725002813.6938-4-paulo.r.zanoni@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 93de6f724e77..72acecaad5c1 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -10705,5 +10705,8 @@ enum skl_power_gate { #define PORT_TX_DFLEXDPSP _MMIO(0x1638A0) #define TC_LIVE_STATE_TBT(tc_port) (1 << ((tc_port) * 8 + 6)) #define TC_LIVE_STATE_TC(tc_port) (1 << ((tc_port) * 8 + 5)) +#define DP_LANE_ASSIGNMENT_SHIFT(tc_port) ((tc_port) * 8) +#define DP_LANE_ASSIGNMENT_MASK(tc_port) (0xf << ((tc_port) * 8)) +#define DP_LANE_ASSIGNMENT(tc_port, x) ((x) << ((tc_port) * 8)) #endif /* _I915_REG_H_ */ |