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| author | Paulo Zanoni | 2013-02-19 20:21:46 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2013-03-04 23:16:57 +0100 |
| commit | dc0fa7181132b1fde269accc4e067b8b833f34ef (patch) | |
| tree | 376bbc9ee110b3f56ed7ff84358537b1b62ff9b7 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: unify the definitions of the HDMI/SDVO register (diff) | |
| download | kernel-qcow2-linux-dc0fa7181132b1fde269accc4e067b8b833f34ef.tar.gz kernel-qcow2-linux-dc0fa7181132b1fde269accc4e067b8b833f34ef.tar.xz kernel-qcow2-linux-dc0fa7181132b1fde269accc4e067b8b833f34ef.zip | |
drm/i915: remove duplicated SDVO/HDMI bit definitions
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 17 |
1 files changed, 6 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 330b64d2614a..f62e4e5014bc 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1693,6 +1693,8 @@ /* Gen 3 SDVO bits: */ #define SDVO_ENABLE (1 << 31) +#define SDVO_PIPE_SEL(pipe) ((pipe) << 30) +#define SDVO_PIPE_SEL_MASK (1 << 30) #define SDVO_PIPE_B_SELECT (1 << 30) #define SDVO_STALL_SELECT (1 << 29) #define SDVO_INTERRUPT_ENABLE (1 << 26) @@ -1719,7 +1721,8 @@ #define COLOR_FORMAT_8bpc (0 << 26) #define SDVO_ENCODING_SDVO (0 << 10) #define SDVO_ENCODING_HDMI (2 << 10) -#define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9) /* HDMI only */ +#define HDMI_MODE_SELECT_HDMI (1 << 9) /* HDMI only */ +#define HDMI_MODE_SELECT_DVI (0 << 9) /* HDMI only */ #define SDVO_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */ #define SDVO_AUDIO_ENABLE (1 << 6) /* VSYNC/HSYNC bits new with 965, default is to be set */ @@ -1731,16 +1734,8 @@ #define SDVOB_HOTPLUG_ENABLE (1 << 23) /* SDVO only */ /* Gen 6 (CPT) SDVO/HDMI bits: */ -#define TRANSCODER_CPT(pipe) ((pipe) << 29) -#define TRANSCODER_MASK_CPT (3 << 29) - -/* Repeated but still used bits: */ -#define PORT_ENABLE (1 << 31) -#define TRANSCODER(pipe) ((pipe) << 30) -#define TRANSCODER_MASK (1 << 30) -#define HDMI_MODE_SELECT (1 << 9) -#define DVI_MODE_SELECT (0 << 9) -#define PORT_DETECTED (1 << 2) +#define SDVO_PIPE_SEL_CPT(pipe) ((pipe) << 29) +#define SDVO_PIPE_SEL_MASK_CPT (3 << 29) /* DVO port control */ |