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| author | Robert Beckett | 2015-03-11 09:28:25 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2015-04-14 13:55:23 +0200 |
| commit | e3a290553f3b09b657962e0a952fcf9b117bc08b (patch) | |
| tree | d9f69e2cd278c8c5925e12b729c9ce1a9f33228d /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/skl: add WaDisableMaskBasedCammingInRCC workaround (diff) | |
| download | kernel-qcow2-linux-e3a290553f3b09b657962e0a952fcf9b117bc08b.tar.gz kernel-qcow2-linux-e3a290553f3b09b657962e0a952fcf9b117bc08b.tar.xz kernel-qcow2-linux-e3a290553f3b09b657962e0a952fcf9b117bc08b.zip | |
drm/i915/bxt: add workaround to avoid PTE corruption
Set TLBPF in TILECTL. This fixes an issue with BXT HW seeing
corrupted pte entries.
v2:
- move the workaround to bxt_init_clock_gating (imre)
Signed-off-by: Robert Beckett <robert.beckett@intel.com> (v1)
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index a22745855740..21e69cab6efe 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1150,6 +1150,7 @@ enum skl_disp_power_wells { /* control register for cpu gtt access */ #define TILECTL 0x101000 #define TILECTL_SWZCTL (1 << 0) +#define TILECTL_TLBPF (1 << 1) #define TILECTL_TLB_PREFETCH_DIS (1 << 2) #define TILECTL_BACKSNOOP_DIS (1 << 3) |