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| author | Kenneth Graunke | 2010-09-11 10:24:50 +0200 |
|---|---|---|
| committer | Chris Wilson | 2010-09-21 12:19:47 +0200 |
| commit | eeccdcac07c1e21d25e7d3cf70030059a3017f0c (patch) | |
| tree | 23642ef5cc72448dbde93e02d5d9b55c096a7221 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Actually set the reset bit in i965_reset. (diff) | |
| download | kernel-qcow2-linux-eeccdcac07c1e21d25e7d3cf70030059a3017f0c.tar.gz kernel-qcow2-linux-eeccdcac07c1e21d25e7d3cf70030059a3017f0c.tar.xz kernel-qcow2-linux-eeccdcac07c1e21d25e7d3cf70030059a3017f0c.zip | |
drm/i915: Rename graphics reset registers.
The graphics domains are listed as GRDOM in the documentation, and the
GDRST PCI config register (0xc0) is only valid on I965 and GM45. Newer
chips (like Sandy Bridge) have a different GDRST.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 18e3749fbd11..565a7a3ccd4e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -108,10 +108,12 @@ #define I915_GC_RENDER_CLOCK_200_MHZ (1 << 0) #define I915_GC_RENDER_CLOCK_333_MHZ (4 << 0) #define LBB 0xf4 -#define GDRST 0xc0 -#define GDRST_FULL (0<<2) -#define GDRST_RENDER (1<<2) -#define GDRST_MEDIA (3<<2) + +/* Graphics reset regs */ +#define I965_GDRST 0xc0 +#define GRDOM_FULL (0<<2) +#define GRDOM_RENDER (1<<2) +#define GRDOM_MEDIA (3<<2) /* VGA stuff */ |