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| author | Madhav Chauhan | 2018-11-29 15:12:30 +0100 |
|---|---|---|
| committer | Jani Nikula | 2018-12-03 14:54:49 +0100 |
| commit | f4ff2120301d85ce18438dbb64ad4bf5e9382506 (patch) | |
| tree | 1732e45e484c56f9fa224600e409c580c2fa6926 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/icl: Define missing bitfield for shortplug reg (diff) | |
| download | kernel-qcow2-linux-f4ff2120301d85ce18438dbb64ad4bf5e9382506.tar.gz kernel-qcow2-linux-f4ff2120301d85ce18438dbb64ad4bf5e9382506.tar.xz kernel-qcow2-linux-f4ff2120301d85ce18438dbb64ad4bf5e9382506.zip | |
drm/i915/icl: Define Panel power ctrl register
There are two panel power sequencers. Each register
has two addressable instances. This patch defines
both the instances of Panel power control register
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/99bb687b17a9165527a6210a79271c8175c8a4e3.1543500286.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 776f445fca25..0a7d60509ca7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4618,6 +4618,17 @@ enum { #define _PP_STATUS 0x61200 #define PP_STATUS(pps_idx) _MMIO_PPS(pps_idx, _PP_STATUS) #define PP_ON (1 << 31) + +#define _PP_CONTROL_1 0xc7204 +#define _PP_CONTROL_2 0xc7304 +#define ICP_PP_CONTROL(x) _MMIO(((x) == 1) ? _PP_CONTROL_1 : \ + _PP_CONTROL_2) +#define POWER_CYCLE_DELAY_MASK (0x1f << 4) +#define POWER_CYCLE_DELAY_SHIFT 4 +#define VDD_OVERRIDE_FORCE (1 << 3) +#define BACKLIGHT_ENABLE (1 << 2) +#define PWR_DOWN_ON_RESET (1 << 1) +#define PWR_STATE_TARGET (1 << 0) /* * Indicates that all dependencies of the panel are on: * |