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| author | David Weinehall | 2015-06-25 10:11:03 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2015-06-30 12:35:30 +0200 |
| commit | f8896f5d58e64bfd3c2b5f7c5ba5c3f3967e93c7 (patch) | |
| tree | 25fbaeaf14d231c3a780c483d08637ef5038e446 /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915: Zero unused WM1 watermarks on VLV/CHV (diff) | |
| download | kernel-qcow2-linux-f8896f5d58e64bfd3c2b5f7c5ba5c3f3967e93c7.tar.gz kernel-qcow2-linux-f8896f5d58e64bfd3c2b5f7c5ba5c3f3967e93c7.tar.xz kernel-qcow2-linux-f8896f5d58e64bfd3c2b5f7c5ba5c3f3967e93c7.zip | |
drm/i915/skl: Buffer translation improvements
This patch adds support for 0.85V VccIO on Skylake Y,
separate buffer translation tables for Skylake U,
and support for I_boost for the entries that needs this.
Changes in v2:
* Refactored the code a bit to move all DDI signal level setup to
intel_ddi.c
Issue: VIZ-5677
Signed-off-by: David Weinehall <david.weinehall@linux.intel.com>
Reviewed-by: Antti Koskipää <antti.koskipaa@linux.intel.com>
[danvet: Apply style polish checkpatch suggested.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 50e6279d7d56..bdef9f7b629e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -1384,6 +1384,18 @@ enum skl_disp_power_wells { _PORT_TX_DW14_LN0_C) + \ _BXT_LANE_OFFSET(lane)) +/* UAIMI scratch pad register 1 */ +#define UAIMI_SPR1 0x4F074 +/* SKL VccIO mask */ +#define SKL_VCCIO_MASK 0x1 +/* SKL balance leg register */ +#define DISPIO_CR_TX_BMU_CR0 0x6C00C +/* I_boost values */ +#define BALANCE_LEG_SHIFT(port) (8+3*(port)) +#define BALANCE_LEG_MASK(port) (7<<(8+3*(port))) +/* Balance leg disable bits */ +#define BALANCE_LEG_DISABLE_SHIFT 23 + /* * Fence registers */ |