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| author | Madhav Chauhan | 2018-07-05 15:49:33 +0200 |
|---|---|---|
| committer | Jani Nikula | 2018-07-06 11:13:34 +0200 |
| commit | fcfe0bdcb1911a4ff6ab6b6264e3323745178025 (patch) | |
| tree | 0d2cbc854cc40210ff3c8109db01d1f8e27b4cec /drivers/gpu/drm/i915/i915_reg.h | |
| parent | drm/i915/dsi: update some of the platform based checks (diff) | |
| download | kernel-qcow2-linux-fcfe0bdcb1911a4ff6ab6b6264e3323745178025.tar.gz kernel-qcow2-linux-fcfe0bdcb1911a4ff6ab6b6264e3323745178025.tar.xz kernel-qcow2-linux-fcfe0bdcb1911a4ff6ab6b6264e3323745178025.zip | |
drm/i915/icl: Program DSI Escape clock Divider
Escape Clock is used for LP communication across the DSI
Link. To achieve the constant frequency of the escape clock
from the variable DPLL frequency output, a variable divider(M)
is needed. This patch programs the same.
v2: (Jani N) Don't end line with "(".
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1530798591-2077-3-git-send-email-madhav.chauhan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/i915_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index dc953ee7e3b3..a35f4142cced 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9552,6 +9552,7 @@ enum skl_power_gate { #define ICL_BYTE_CLK_PER_ESC_CLK_SHIFT 16 #define ICL_ESC_CLK_DIV_MASK 0x1ff #define ICL_ESC_CLK_DIV_SHIFT 0 +#define DSI_MAX_ESC_CLK 20000 /* in KHz */ /* Gen4+ Timestamp and Pipe Frame time stamp registers */ #define GEN4_TIMESTAMP _MMIO(0x2358) |