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| author | Jesse Barnes | 2012-04-18 00:06:33 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2012-04-18 10:34:49 +0200 |
| commit | df0323c42ac35f81b49e25fe04e8e52b9c6f6467 (patch) | |
| tree | ad651d75626df4bdbd3ddbefa540a4e5649d5b0d /drivers/gpu/drm/i915/intel_acpi.c | |
| parent | drm/i915: Mask reserved bits in display/sprite address registers (diff) | |
| download | kernel-qcow2-linux-df0323c42ac35f81b49e25fe04e8e52b9c6f6467.tar.gz kernel-qcow2-linux-df0323c42ac35f81b49e25fe04e8e52b9c6f6467.tar.xz kernel-qcow2-linux-df0323c42ac35f81b49e25fe04e8e52b9c6f6467.zip | |
drm/i915: IBX+ doesn't have separate vsync/hsync controls on the VGA DAC
When the PCH split occurred, hw dropped support for separate hsync and
vsync disable in the VGA DAC. So add a PCH specific DPMS function that
just uses the port enable bit for controlling DPMS states.
Before this fix, when anything other than a full DPMS off occurred,
the VGA port would be left enabled and scanning out while all the other
heads would turn off as expected.
v2: duplicate encoder helper vtable into pch and gmch versions (Daniel)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=48491
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: s/intel_crt_dpms/gmch_crt_dpms as suggested by Chris.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_acpi.c')
0 files changed, 0 insertions, 0 deletions