diff options
author | Paulo Zanoni | 2014-01-17 16:51:09 +0100 |
---|---|---|
committer | Daniel Vetter | 2014-02-12 18:53:08 +0100 |
commit | 0372264a6d556a03cba590aec9f82fc57e9fedcb (patch) | |
tree | 15f2e4875699fc988b1e02108d83e21062f8273b /drivers/gpu/drm/i915/intel_display.c | |
parent | drm/i915: remove the vblank_wait hack from HSW+ (diff) | |
download | kernel-qcow2-linux-0372264a6d556a03cba590aec9f82fc57e9fedcb.tar.gz kernel-qcow2-linux-0372264a6d556a03cba590aec9f82fc57e9fedcb.tar.xz kernel-qcow2-linux-0372264a6d556a03cba590aec9f82fc57e9fedcb.zip |
drm/i915: pass intel_crtc as argument for intel_enable_pipe
We want to remove those 3 boolean arguments. This is the first step.
The "pipe" passed as the argument is always intel_crtc->pipe.
Also adjust the function documentation.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 29 |
1 files changed, 14 insertions, 15 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 8215ba23cb0b..af99b6df8d59 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1746,21 +1746,20 @@ static void lpt_disable_pch_transcoder(struct drm_i915_private *dev_priv) /** * intel_enable_pipe - enable a pipe, asserting requirements - * @dev_priv: i915 private structure - * @pipe: pipe to enable + * @crtc: crtc responsible for the pipe * @pch_port: on ILK+, is this pipe driving a PCH port or not + * @dsi: output type is DSI + * @wait_for_vblank: whether we should for a vblank or not after enabling it * - * Enable @pipe, making sure that various hardware specific requirements + * Enable @crtc's pipe, making sure that various hardware specific requirements * are met, if applicable, e.g. PLL enabled, LVDS pairs enabled, etc. - * - * @pipe should be %PIPE_A or %PIPE_B. - * - * Will wait until the pipe is actually running (i.e. first vblank) before - * returning. */ -static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, +static void intel_enable_pipe(struct intel_crtc *crtc, bool pch_port, bool dsi, bool wait_for_vblank) { + struct drm_device *dev = crtc->base.dev; + struct drm_i915_private *dev_priv = dev->dev_private; + enum pipe pipe = crtc->pipe; enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv, pipe); enum pipe pch_transcoder; @@ -3600,8 +3599,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, - intel_crtc->config.has_pch_encoder, false, true); + intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false, + true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); intel_crtc_update_cursor(crtc, true); @@ -3746,8 +3745,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) intel_ddi_enable_transcoder_func(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, - intel_crtc->config.has_pch_encoder, false, false); + intel_enable_pipe(intel_crtc, intel_crtc->config.has_pch_encoder, false, + false); if (intel_crtc->config.has_pch_encoder) lpt_pch_enable(crtc); @@ -4172,7 +4171,7 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, false, is_dsi, true); + intel_enable_pipe(intel_crtc, false, is_dsi, true); intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); @@ -4211,7 +4210,7 @@ static void i9xx_crtc_enable(struct drm_crtc *crtc) intel_crtc_load_lut(crtc); intel_update_watermarks(crtc); - intel_enable_pipe(dev_priv, pipe, false, false, true); + intel_enable_pipe(intel_crtc, false, false, true); intel_set_cpu_fifo_underrun_reporting(dev, pipe, true); intel_enable_primary_plane(dev_priv, plane, pipe); intel_enable_planes(crtc); |