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| author | Maarten Lankhorst | 2016-10-26 15:41:36 +0200 |
|---|---|---|
| committer | Maarten Lankhorst | 2016-11-01 14:43:58 +0100 |
| commit | 03af79e0b801fa5ea817f71a22a932d4b5b62b4b (patch) | |
| tree | 98df4d2595207a7e6d8f29648f0d128382e79a88 /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915/skl+: Clean up minimum allocations, v2. (diff) | |
| download | kernel-qcow2-linux-03af79e0b801fa5ea817f71a22a932d4b5b62b4b.tar.gz kernel-qcow2-linux-03af79e0b801fa5ea817f71a22a932d4b5b62b4b.tar.xz kernel-qcow2-linux-03af79e0b801fa5ea817f71a22a932d4b5b62b4b.zip | |
drm/i915/gen9+: Use the watermarks from crtc_state for everything, v2.
There's no need to keep a duplicate skl_pipe_wm around any more,
everything can be discovered from crtc_state, which we pass around
correctly now even in case of plane disable.
The copy in intel_crtc->wm.skl.active is equal to
crtc_state->wm.skl.optimal after the atomic commit completes.
It's useful for two-step watermark programming, but not required for
gen9+ which does it in a single step. We can pull the old allocation
from old_crtc_state.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1477489299-25777-9-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 740c68896672..5a87dbf6f090 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -13458,7 +13458,7 @@ static void verify_wm_state(struct drm_crtc *crtc, return; skl_pipe_wm_get_hw_state(crtc, &hw_wm); - sw_wm = &intel_crtc->wm.active.skl; + sw_wm = &to_intel_crtc_state(new_state)->wm.skl.optimal; skl_ddb_get_hw_state(dev_priv, &hw_ddb); sw_ddb = &dev_priv->wm.skl_hw.ddb; |