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| author | Ville Syrjälä | 2013-06-04 12:49:07 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2013-06-06 13:57:22 +0200 |
| commit | 14420bd0065c1757a353e36ebc9cc4bdc6932dcd (patch) | |
| tree | d6bb3515ad862a66897c2f5b1373fc3571416c60 /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: Spruce up assert_sprites_disabled() (diff) | |
| download | kernel-qcow2-linux-14420bd0065c1757a353e36ebc9cc4bdc6932dcd.tar.gz kernel-qcow2-linux-14420bd0065c1757a353e36ebc9cc4bdc6932dcd.tar.xz kernel-qcow2-linux-14420bd0065c1757a353e36ebc9cc4bdc6932dcd.zip | |
drm/i915: Assert dpll running in intel_crtc_load_lut() on pre-PCH platforms
Adding more context from Ville's reply to Rodrigo's question why we
need this:
"The spec says that on some hardware you need to PLL running before you
can poke at the palette registers. I didn't actually try to anger the
hardware so I'm not really sure what would happen otherwise, but IIRC
Jesse said something about a hard system hang..."
And generally documenting such ordering constraints with asserts is
Just Good.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
[danvet: Spruce up the commit message a lot.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c593ed0ca1b9..0e1f82810f58 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6311,6 +6311,9 @@ void intel_crtc_load_lut(struct drm_crtc *crtc) if (!crtc->enabled || !intel_crtc->active) return; + if (!HAS_PCH_SPLIT(dev_priv->dev)) + assert_pll_enabled(dev_priv, pipe); + /* use legacy palette for Ironlake */ if (HAS_PCH_SPLIT(dev)) palreg = LGC_PALETTE(pipe); |