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| author | Imre Deak | 2013-05-08 12:14:04 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2013-05-10 21:56:39 +0200 |
| commit | 2de6905f0a30c8fbe293e1e3ecdb766bbf5f7760 (patch) | |
| tree | 35f97ef95c8bc0e7e54e1ca298fab8320259375e /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: hsw: replace !is_pch_edp() with port==PORT_A (diff) | |
| download | kernel-qcow2-linux-2de6905f0a30c8fbe293e1e3ecdb766bbf5f7760.tar.gz kernel-qcow2-linux-2de6905f0a30c8fbe293e1e3ecdb766bbf5f7760.tar.xz kernel-qcow2-linux-2de6905f0a30c8fbe293e1e3ecdb766bbf5f7760.zip | |
drm/i915: ilk-ivb: replace !is_pch_edp() with port==PORT_A
On ILK-IVB the CPU side eDP is always on port-A.
Also reduce somewhat the debug verbosity.
v2:
- reduce debug verbosity
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 157a68f48060..4ca2a3d885a0 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5045,7 +5045,6 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) u32 val, final; bool has_lvds = false; bool has_cpu_edp = false; - bool has_pch_edp = false; bool has_panel = false; bool has_ck505 = false; bool can_ssc = false; @@ -5060,9 +5059,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) break; case INTEL_OUTPUT_EDP: has_panel = true; - if (intel_encoder_is_pch_edp(&encoder->base)) - has_pch_edp = true; - else + if (enc_to_dig_port(&encoder->base)->port == PORT_A) has_cpu_edp = true; break; } @@ -5076,9 +5073,8 @@ static void ironlake_init_pch_refclk(struct drm_device *dev) can_ssc = true; } - DRM_DEBUG_KMS("has_panel %d has_lvds %d has_pch_edp %d has_cpu_edp %d has_ck505 %d\n", - has_panel, has_lvds, has_pch_edp, has_cpu_edp, - has_ck505); + DRM_DEBUG_KMS("has_panel %d has_lvds %d has_ck505 %d\n", + has_panel, has_lvds, has_ck505); /* Ironlake: try to setup display ref clock before DPLL * enabling. This is only under driver's control after |