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| author | Imre Deak | 2016-09-14 12:04:13 +0200 |
|---|---|---|
| committer | Imre Deak | 2016-09-20 14:04:43 +0200 |
| commit | 51f592050a523fc5882f9b8b4e9259422e41e848 (patch) | |
| tree | 3ab786de9634a9645fff698133014cac9414656d /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915/backlight: setup backlight pwm alternate increment on backlight enable (diff) | |
| download | kernel-qcow2-linux-51f592050a523fc5882f9b8b4e9259422e41e848.tar.gz kernel-qcow2-linux-51f592050a523fc5882f9b8b4e9259422e41e848.tar.xz kernel-qcow2-linux-51f592050a523fc5882f9b8b4e9259422e41e848.zip | |
drm/i915: Unlock PPS registers after GPU reset
Reapply the PPS register unlock workaround after GPU reset on platforms
where the reset clobbers the display HW state. This at least gets rid of
the related WARN during LVDS encoder enabling on PNV.
Fixes: ed6143b8f75 ("drm/i915/lvds: Restore initial HW state during encoder enabling")
Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1473847453-4771-1-git-send-email-imre.deak@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 69b80d078f06..18fdbb7f6c28 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3627,6 +3627,7 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) intel_runtime_pm_disable_interrupts(dev_priv); intel_runtime_pm_enable_interrupts(dev_priv); + intel_pps_unlock_regs_wa(dev_priv); intel_modeset_init_hw(dev); spin_lock_irq(&dev_priv->irq_lock); |