diff options
| author | Daniel Vetter | 2014-04-24 23:55:07 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2014-05-20 14:08:58 +0200 |
| commit | 644cef34670aea8a995aa454d92e51c3180015a1 (patch) | |
| tree | 4c34fbecfde52de07e8dc01f5b73386ae6f19a17 /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: Shovel hw setup code out of i9xx_crtc_mode_set (diff) | |
| download | kernel-qcow2-linux-644cef34670aea8a995aa454d92e51c3180015a1.tar.gz kernel-qcow2-linux-644cef34670aea8a995aa454d92e51c3180015a1.tar.xz kernel-qcow2-linux-644cef34670aea8a995aa454d92e51c3180015a1.zip | |
drm/i915: Move lowfreq_avail around a bit in ilk/hsw_crtc_mode_set
Now this really should be in the pipe config somewhere, but till now
it isn't. We can at least move it up a bit next to all the other pll
code since intel_dp_set_m_n really doesn't depend upon this.
This is just prep work so that moving all the hw frobbing code from
->crtc_mode_set to ->crtc_enable is clean.
v2: Do the same for haswell while at it, not just for ivb.
Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 5fb11beef19f..7541bac041d7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6890,14 +6890,14 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, } else intel_put_shared_dpll(intel_crtc); - if (intel_crtc->config.has_dp_encoder) - intel_dp_set_m_n(intel_crtc); - if (is_lvds && has_reduced_clock && i915.powersave) intel_crtc->lowfreq_avail = true; else intel_crtc->lowfreq_avail = false; + if (intel_crtc->config.has_dp_encoder) + intel_dp_set_m_n(intel_crtc); + intel_set_pipe_timings(intel_crtc); if (intel_crtc->config.has_pch_encoder) { @@ -7388,11 +7388,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, return -EINVAL; intel_ddi_pll_enable(intel_crtc); + intel_crtc->lowfreq_avail = false; + if (intel_crtc->config.has_dp_encoder) intel_dp_set_m_n(intel_crtc); - intel_crtc->lowfreq_avail = false; - intel_set_pipe_timings(intel_crtc); if (intel_crtc->config.has_pch_encoder) { |