diff options
| author | Ville Syrjälä | 2013-06-04 12:49:05 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2013-06-06 13:49:04 +0200 |
| commit | 653e10266df8319d6003fbf46ec34865a5a363f6 (patch) | |
| tree | ca7327a810cd109f86ef733fabd65e401e0203fc /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: Disable/restore all sprite planes around modeset (diff) | |
| download | kernel-qcow2-linux-653e10266df8319d6003fbf46ec34865a5a363f6.tar.gz kernel-qcow2-linux-653e10266df8319d6003fbf46ec34865a5a363f6.tar.xz kernel-qcow2-linux-653e10266df8319d6003fbf46ec34865a5a363f6.zip | |
drm/i915: Improve assert_planes_disabled()
Ever since gen4 primary planes were fixed to pipes.
And for gen2-3, don't check plane B if it doesn't exist.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f084a1dd8f4d..0f0ac933bd6c 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1105,12 +1105,13 @@ static void assert_plane(struct drm_i915_private *dev_priv, static void assert_planes_disabled(struct drm_i915_private *dev_priv, enum pipe pipe) { + struct drm_device *dev = dev_priv->dev; int reg, i; u32 val; int cur_pipe; - /* Planes are fixed to pipes on ILK+ */ - if (HAS_PCH_SPLIT(dev_priv->dev) || IS_VALLEYVIEW(dev_priv->dev)) { + /* Primary planes are fixed to pipes on gen4+ */ + if (INTEL_INFO(dev)->gen >= 4) { reg = DSPCNTR(pipe); val = I915_READ(reg); WARN((val & DISPLAY_PLANE_ENABLE), @@ -1120,7 +1121,7 @@ static void assert_planes_disabled(struct drm_i915_private *dev_priv, } /* Need to check both planes against the pipe */ - for (i = 0; i < 2; i++) { + for (i = 0; i < INTEL_INFO(dev)->num_pipes; i++) { reg = DSPCNTR(i); val = I915_READ(reg); cur_pipe = (val & DISPPLANE_SEL_PIPE_MASK) >> |