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| author | Chris Wilson | 2016-08-24 12:16:07 +0200 |
|---|---|---|
| committer | Chris Wilson | 2016-08-24 20:33:20 +0200 |
| commit | 79cf219a6a2ecf553587fae41b117d8c49cc0a55 (patch) | |
| tree | f4e3bd35a46812d37863b3e5bf50931cec0dda79 /drivers/gpu/drm/i915/intel_display.c | |
| parent | Revert "drm/i915/fbc: Allow on unfenced surfaces, for recent gen" (diff) | |
| download | kernel-qcow2-linux-79cf219a6a2ecf553587fae41b117d8c49cc0a55.tar.gz kernel-qcow2-linux-79cf219a6a2ecf553587fae41b117d8c49cc0a55.tar.xz kernel-qcow2-linux-79cf219a6a2ecf553587fae41b117d8c49cc0a55.zip | |
drm/i915: Suppress DRM_ERROR for D_COMP write on Haswell
The D_COMP (render decompression) register write is followed by a status
check and another error (either that the decompression shutdown or the
lpll is enabled). Since we are followed by another, more pertinent,
error we can reduce the pcode timeout to a debug and squelch a sporadic
error message during suspend.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97465
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: http://patchwork.freedesktop.org/patch/msgid/20160824101607.13671-1-chris@chris-wilson.co.uk
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index fc953739af69..16a6e1896286 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -10022,7 +10022,7 @@ static void hsw_write_dcomp(struct drm_i915_private *dev_priv, uint32_t val) mutex_lock(&dev_priv->rps.hw_lock); if (sandybridge_pcode_write(dev_priv, GEN6_PCODE_WRITE_D_COMP, val)) - DRM_ERROR("Failed to write to D_COMP\n"); + DRM_DEBUG_KMS("Failed to write to D_COMP\n"); mutex_unlock(&dev_priv->rps.hw_lock); } else { I915_WRITE(D_COMP_BDW, val); |