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| author | Ville Syrjälä | 2015-10-30 18:22:21 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2015-11-10 15:23:17 +0100 |
| commit | aca7b684bab9da1e3071ad872f1d78d41ae7a706 (patch) | |
| tree | f33e437eacaef926d59a83ee225cc3ff7dd9d71d /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: Re-enable PCH FIO underrun reporting after pipe has been disabled (diff) | |
| download | kernel-qcow2-linux-aca7b684bab9da1e3071ad872f1d78d41ae7a706.tar.gz kernel-qcow2-linux-aca7b684bab9da1e3071ad872f1d78d41ae7a706.tar.xz kernel-qcow2-linux-aca7b684bab9da1e3071ad872f1d78d41ae7a706.zip | |
drm/i915: Check for FIFO underruns after modeset on IVB/HSW and CPT/PPT
Due to the shared error interrupt on IVB/HSW and CPT/PPT we may not
always get an interrupt on a FIFO underrun. But we can always do an
explicit check (like we do on GMCH platforms that have no underrun
interrupt).
v2: Drop stale kerneldoc for i9xx_check_fifo_underruns() (Daniel)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/1446225741-11070-1-git-send-email-ville.syrjala@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f859f86c18b0..5046b99da459 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4688,9 +4688,9 @@ intel_post_enable_primary(struct drm_crtc *crtc) if (IS_GEN2(dev)) intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, true); - /* Underruns don't raise interrupts, so check manually. */ - if (HAS_GMCH_DISPLAY(dev)) - i9xx_check_fifo_underruns(dev_priv); + /* Underruns don't always raise interrupts, so check manually. */ + intel_check_cpu_fifo_underruns(dev_priv); + intel_check_pch_fifo_underruns(dev_priv); } /** |