diff options
| author | Paulo Zanoni | 2012-11-29 14:29:32 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2012-12-08 14:00:35 +0100 |
| commit | d4b1931c149e1cf78a930d7abde00bd378272e6e (patch) | |
| tree | 54e314dbd541f9b3d8dcfef818d7704af35069cd /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: fix hsw_fdi_link_train "retry" code (diff) | |
| download | kernel-qcow2-linux-d4b1931c149e1cf78a930d7abde00bd378272e6e.tar.gz kernel-qcow2-linux-d4b1931c149e1cf78a930d7abde00bd378272e6e.tar.xz kernel-qcow2-linux-d4b1931c149e1cf78a930d7abde00bd378272e6e.zip | |
drm/i915: reject modes the LPT FDI receiver can't handle
More specifically, the LPT FDI RX only supports 8bpc and a maximum of
2 lanes, so anything above that won't work and should be rejected.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f8ee3d16109c..41e2d9508ef6 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5228,6 +5228,17 @@ static bool ironlake_check_fdi_lanes(struct intel_crtc *intel_crtc) } } +int ironlake_get_lanes_required(int target_clock, int link_bw, int bpp) +{ + /* + * Account for spread spectrum to avoid + * oversubscribing the link. Max center spread + * is 2.5%; use 5% for safety's sake. + */ + u32 bps = target_clock * bpp * 21 / 20; + return bps / (link_bw * 8) + 1; +} + static void ironlake_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) @@ -5281,15 +5292,9 @@ static void ironlake_set_m_n(struct drm_crtc *crtc, else target_clock = adjusted_mode->clock; - if (!lane) { - /* - * Account for spread spectrum to avoid - * oversubscribing the link. Max center spread - * is 2.5%; use 5% for safety's sake. - */ - u32 bps = target_clock * intel_crtc->bpp * 21 / 20; - lane = bps / (link_bw * 8) + 1; - } + if (!lane) + lane = ironlake_get_lanes_required(target_clock, link_bw, + intel_crtc->bpp); intel_crtc->fdi_lanes = lane; |