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| author | Daniel Vetter | 2014-06-25 21:02:03 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2014-07-10 22:13:31 +0200 |
| commit | df8ad70ca34f9bdf7e070d1a430bbdcac6acee12 (patch) | |
| tree | 6297999ad809760fdde59de8f77362763a1f008d /drivers/gpu/drm/i915/intel_display.c | |
| parent | drm/i915: Switch to common shared dpll framework for WRPLLs (diff) | |
| download | kernel-qcow2-linux-df8ad70ca34f9bdf7e070d1a430bbdcac6acee12.tar.gz kernel-qcow2-linux-df8ad70ca34f9bdf7e070d1a430bbdcac6acee12.tar.xz kernel-qcow2-linux-df8ad70ca34f9bdf7e070d1a430bbdcac6acee12.zip | |
drm/i915: Only touch WRPLL hw state in enable/disable hooks
To be able to do this we need to separately keep track of how many
crtcs need a given WRPLL and how many actually actively use it. The
common shared dpll framework already has all this, including massive
state readout and cross checking. Which allows us to do this switch in
a fairly small patch.
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index a3305a074650..6362524cd8d1 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4080,6 +4080,9 @@ static void haswell_crtc_enable(struct drm_crtc *crtc) if (intel_crtc->active) return; + if (intel_crtc_to_shared_dpll(intel_crtc)) + intel_enable_shared_dpll(intel_crtc); + if (intel_crtc->config.has_dp_encoder) intel_dp_set_m_n(intel_crtc); @@ -4266,6 +4269,9 @@ static void haswell_crtc_disable(struct drm_crtc *crtc) mutex_lock(&dev->struct_mutex); intel_update_fbc(dev); mutex_unlock(&dev->struct_mutex); + + if (intel_crtc_to_shared_dpll(intel_crtc)) + intel_disable_shared_dpll(intel_crtc); } static void ironlake_crtc_off(struct drm_crtc *crtc) @@ -4274,10 +4280,6 @@ static void ironlake_crtc_off(struct drm_crtc *crtc) intel_put_shared_dpll(intel_crtc); } -static void haswell_crtc_off(struct drm_crtc *crtc) -{ - intel_ddi_put_crtc_pll(crtc); -} static void i9xx_pfit_enable(struct intel_crtc *crtc) { @@ -7570,9 +7572,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, if (!intel_ddi_pll_select(intel_crtc)) return -EINVAL; - if (intel_crtc_to_shared_dpll(intel_crtc)) - intel_enable_shared_dpll(intel_crtc); - intel_crtc->lowfreq_avail = false; return 0; @@ -12216,7 +12215,7 @@ static void intel_init_display(struct drm_device *dev) dev_priv->display.crtc_mode_set = haswell_crtc_mode_set; dev_priv->display.crtc_enable = haswell_crtc_enable; dev_priv->display.crtc_disable = haswell_crtc_disable; - dev_priv->display.off = haswell_crtc_off; + dev_priv->display.off = ironlake_crtc_off; dev_priv->display.update_primary_plane = ironlake_update_primary_plane; } else if (HAS_PCH_SPLIT(dev)) { |