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| author | Ville Syrjälä | 2018-02-21 19:48:07 +0100 |
|---|---|---|
| committer | Ville Syrjälä | 2018-02-22 16:41:37 +0100 |
| commit | f7a02ad7d16b24908b9fddbd6176b1c1a2b35058 (patch) | |
| tree | 645fb1ec064fc9135b46dc23ed9153a58b3dc5a0 /drivers/gpu/drm/i915/intel_drv.h | |
| parent | drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout (diff) | |
| download | kernel-qcow2-linux-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.tar.gz kernel-qcow2-linux-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.tar.xz kernel-qcow2-linux-f7a02ad7d16b24908b9fddbd6176b1c1a2b35058.zip | |
drm/i915: Only pin the fence for primary planes (and gen2/3)
Currently we pin a fence on every plane doing tiled scanout. The
number of planes we have available is fast apporaching the number
of fences so we really should stop wasting them. Only FBC needs
the fence on gen4+, so let's use fences only for the primary planes
on those platforms.
v2: drop the tiling check from plane_uses_fence() as the obj is
NULL during initial_plane_config() and we don't rally need the
check since i915_vma_pin_fence() does the check anyway
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221184807.577-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_drv.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_drv.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 04fc4bd12329..80881218bfc9 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h @@ -1424,6 +1424,7 @@ void intel_release_load_detect_pipe(struct drm_connector *connector, struct i915_vma * intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, unsigned int rotation, + bool uses_fence, unsigned long *out_flags); void intel_unpin_fb_vma(struct i915_vma *vma, unsigned long flags); struct drm_framebuffer * |