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| author | Dave Gordon | 2016-06-20 16:18:07 +0200 |
|---|---|---|
| committer | Tvrtko Ursulin | 2016-06-21 12:24:25 +0200 |
| commit | 0b63bb1412bf9b2d72d60e38d07bd9dfe657a382 (patch) | |
| tree | 51d705c4b68c026dac5a3d7a473c8c64453bbe84 /drivers/gpu/drm/i915/intel_guc.h | |
| parent | drm/i915/fbdev: Flush mode configuration before lastclose (diff) | |
| download | kernel-qcow2-linux-0b63bb1412bf9b2d72d60e38d07bd9dfe657a382.tar.gz kernel-qcow2-linux-0b63bb1412bf9b2d72d60e38d07bd9dfe657a382.tar.xz kernel-qcow2-linux-0b63bb1412bf9b2d72d60e38d07bd9dfe657a382.zip | |
drm/i915/guc: index host arrays by i915 engine ID, not guc_id
The ONLY places that guc_id (aka hw_id) should be used are those where
the value or address is determined by and shared with the GuC firmware;
specifically, when filling in the GuC-context-descriptor or the GuC
addon data, or putting an entry in the GuC's work queue.
It need not (and therefore should not) be used to index GuC statistics
or similar host-managed tracking data. In particular, i915_guc_submit()
produces (and debugfs decodes) GuC submission statistics which should be
indexed by driver-engine-id rather then guc-engine-id.
Signed-off-by: Dave Gordon <david.s.gordon@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1466432287-5799-1-git-send-email-david.s.gordon@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h index 4df80cc9a291..3e3e743740c0 100644 --- a/drivers/gpu/drm/i915/intel_guc.h +++ b/drivers/gpu/drm/i915/intel_guc.h @@ -26,6 +26,7 @@ #include "intel_guc_fwif.h" #include "i915_guc_reg.h" +#include "intel_ringbuffer.h" struct drm_i915_gem_request; @@ -86,7 +87,7 @@ struct i915_guc_client { int retcode; /* Per-engine counts of GuC submissions */ - uint64_t submissions[GUC_MAX_ENGINES_NUM]; + uint64_t submissions[I915_NUM_ENGINES]; }; enum intel_guc_fw_status { @@ -143,8 +144,8 @@ struct intel_guc { uint32_t action_fail; /* Total number of failures */ int32_t action_err; /* Last error code */ - uint64_t submissions[GUC_MAX_ENGINES_NUM]; - uint32_t last_seqno[GUC_MAX_ENGINES_NUM]; + uint64_t submissions[I915_NUM_ENGINES]; + uint32_t last_seqno[I915_NUM_ENGINES]; }; /* intel_guc_loader.c */ |