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| author | Michal Wajdeczko | 2017-11-24 18:02:39 +0100 |
|---|---|---|
| committer | Chris Wilson | 2017-11-24 21:47:39 +0100 |
| commit | 53fa54a6ef4fa5a261468d13dc0f54739adaa456 (patch) | |
| tree | 206045cde86fa22b9409d8deded927be84310451 /drivers/gpu/drm/i915/intel_guc_reg.h | |
| parent | drm/i915/pmu: Aggregate all RC6 states into one counter (diff) | |
| download | kernel-qcow2-linux-53fa54a6ef4fa5a261468d13dc0f54739adaa456.tar.gz kernel-qcow2-linux-53fa54a6ef4fa5a261468d13dc0f54739adaa456.tar.xz kernel-qcow2-linux-53fa54a6ef4fa5a261468d13dc0f54739adaa456.zip | |
drm/i915/guc: Use consistent name for scratch register count
We should be consistent on naming of similar definitions.
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20171124170239.29360-1-michal.wajdeczko@intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_reg.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc_reg.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h b/drivers/gpu/drm/i915/intel_guc_reg.h index 0a8ff03d026f..19a9247c5664 100644 --- a/drivers/gpu/drm/i915/intel_guc_reg.h +++ b/drivers/gpu/drm/i915/intel_guc_reg.h @@ -52,7 +52,8 @@ #define SOFT_SCRATCH_COUNT 16 #define UOS_RSA_SCRATCH(i) _MMIO(0xc200 + (i) * 4) -#define UOS_RSA_SCRATCH_MAX_COUNT 64 +#define UOS_RSA_SCRATCH_COUNT 64 + #define DMA_ADDR_0_LOW _MMIO(0xc300) #define DMA_ADDR_0_HIGH _MMIO(0xc304) #define DMA_ADDR_1_LOW _MMIO(0xc308) |