diff options
| author | Tvrtko Ursulin | 2019-06-07 10:45:20 +0200 |
|---|---|---|
| committer | Tvrtko Ursulin | 2019-06-07 13:47:49 +0200 |
| commit | dbc651836372a7b3aaebe2f924db872c5d0804df (patch) | |
| tree | f9535d5fcd71340998c8e9bd9cdf6dd824ac8162 /drivers/gpu/drm/i915/intel_guc_submission.c | |
| parent | drm/i915: Unexport i915_gem_init/fini_aliasing_ppgtt (diff) | |
| download | kernel-qcow2-linux-dbc651836372a7b3aaebe2f924db872c5d0804df.tar.gz kernel-qcow2-linux-dbc651836372a7b3aaebe2f924db872c5d0804df.tar.xz kernel-qcow2-linux-dbc651836372a7b3aaebe2f924db872c5d0804df.zip | |
drm/i915: Convert some more bits to use engine mmio accessors
Remove a couple dev_priv locals as a consequence.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190607084521.16845-1-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_guc_submission.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_guc_submission.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c index a4f98ccef0fe..89592ef778b8 100644 --- a/drivers/gpu/drm/i915/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/intel_guc_submission.c @@ -1306,7 +1306,7 @@ static void guc_interrupts_capture(struct drm_i915_private *dev_priv) */ irqs = _MASKED_BIT_ENABLE(GFX_INTERRUPT_STEERING); for_each_engine(engine, dev_priv, id) - I915_WRITE(RING_MODE_GEN7(engine), irqs); + ENGINE_WRITE(engine, RING_MODE_GEN7, irqs); /* route USER_INTERRUPT to Host, all others are sent to GuC. */ irqs = GT_RENDER_USER_INTERRUPT << GEN8_RCS_IRQ_SHIFT | @@ -1353,7 +1353,7 @@ static void guc_interrupts_release(struct drm_i915_private *dev_priv) irqs = _MASKED_FIELD(GFX_FORWARD_VBLANK_MASK, GFX_FORWARD_VBLANK_NEVER); irqs |= _MASKED_BIT_DISABLE(GFX_INTERRUPT_STEERING); for_each_engine(engine, dev_priv, id) - I915_WRITE(RING_MODE_GEN7(engine), irqs); + ENGINE_WRITE(engine, RING_MODE_GEN7, irqs); /* route all GT interrupts to the host */ I915_WRITE(GUC_BCS_RCS_IER, 0); |