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| author | Chris Wilson | 2010-09-21 15:06:12 +0200 |
|---|---|---|
| committer | Chris Wilson | 2010-09-21 15:22:54 +0200 |
| commit | 4fd21dc8ee6fde52a99042186ff94de1b5e8b43c (patch) | |
| tree | 4fcc7d1a8a9754879709ca123497d3f324b1900c /drivers/gpu/drm/i915/intel_lvds.c | |
| parent | drm/i915: Use the correct DPB GMBUS port for GPIOE (diff) | |
| download | kernel-qcow2-linux-4fd21dc8ee6fde52a99042186ff94de1b5e8b43c.tar.gz kernel-qcow2-linux-4fd21dc8ee6fde52a99042186ff94de1b5e8b43c.tar.xz kernel-qcow2-linux-4fd21dc8ee6fde52a99042186ff94de1b5e8b43c.zip | |
drm/i915/lvds: Unlock the PP register when panel-fitting
As we do not wait for the panel to turn off when we need to adjust the
panel-fitting registers we also need to unlock the PLLs as with the
non-pfit update path.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lvds.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 02c5aed36c87..2bcea8000859 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c @@ -97,6 +97,7 @@ static void intel_lvds_set_power(struct intel_lvds *intel_lvds, bool on) DRM_ERROR("timed out waiting for panel to power off\n"); I915_WRITE(PFIT_CONTROL, 0); intel_lvds->pfit_control = 0; + intel_lvds->pfit_dirty = false; } I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN); @@ -377,8 +378,8 @@ static void intel_lvds_prepare(struct drm_encoder *encoder) I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS); } else if (intel_lvds->pfit_dirty) { I915_WRITE(PP_CONTROL, - I915_READ(PP_CONTROL) & ~POWER_TARGET_ON); - I915_WRITE(LVDS, I915_READ(LVDS) & ~LVDS_PORT_EN); + (I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS) + & ~POWER_TARGET_ON); } else { I915_WRITE(PP_CONTROL, I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS); @@ -438,6 +439,9 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, * screen. Should be enabled before the pipe is enabled, according to * register description and PRM. */ + DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n", + intel_lvds->pfit_control, + intel_lvds->pfit_pgm_ratios); if (wait_for((I915_READ(PP_STATUS) & PP_ON) == 0, 1000)) DRM_ERROR("timed out waiting for panel to power off\n"); |