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author | Mika Kahola | 2015-08-18 13:36:59 +0200 |
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committer | Daniel Vetter | 2015-08-26 10:28:54 +0200 |
commit | adafdc6fcb66ea6541a88884ec522273f857c145 (patch) | |
tree | e24fcbf16ae67547137a4eeb8892d51c78a0871b /drivers/gpu/drm/i915/intel_lvds.c | |
parent | drm/i915: Add vlv_dport_to_phy() (diff) | |
download | kernel-qcow2-linux-adafdc6fcb66ea6541a88884ec522273f857c145.tar.gz kernel-qcow2-linux-adafdc6fcb66ea6541a88884ec522273f857c145.tar.xz kernel-qcow2-linux-adafdc6fcb66ea6541a88884ec522273f857c145.zip |
drm/i915: Store max dotclock
Store max dotclock into dev_priv structure so we are able
to filter out the modes that are not supported by our
platforms.
V2:
- limit the max dot clock frequency to max CD clock frequency
for the gen9 and above
- limit the max dot clock frequency to 90% of the max CD clock
frequency for the older gens
- for Cherryview the max dot clock frequency is limited to 95%
of the max CD clock frequency
- for gen2 and gen3 the max dot clock limit is set to 90% of the
2X max CD clock frequency
V3:
- max_dotclk variable renamed as max_dotclk_freq in i915_drv.h
- in intel_compute_max_dotclk() the rounding method changed from
round up to round down when computing max dotclock
V4:
- Haswell and Broadwell supports now dot clocks up to max CD clock
frequency
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_lvds.c')
0 files changed, 0 insertions, 0 deletions