diff options
| author | Damien Lespiau | 2014-11-04 18:06:57 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2014-11-07 18:42:12 +0100 |
| commit | 407b50f31ba19317cdc30530d30220182e42fa3d (patch) | |
| tree | 13ff73231a87fcc3d6955437915f1d3725320cea /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915/skl: Reduce the number of holes in struct skl_wm_level (diff) | |
| download | kernel-qcow2-linux-407b50f31ba19317cdc30530d30220182e42fa3d.tar.gz kernel-qcow2-linux-407b50f31ba19317cdc30530d30220182e42fa3d.tar.xz kernel-qcow2-linux-407b50f31ba19317cdc30530d30220182e42fa3d.zip | |
drm/i915/skl: Move all the WM compute functions in one place
The DDB allocation code managed to split in two the compute functions.
Bring back skl_compute_transition_wm() and skl_compute_linetime_wm()
with their little friends.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 858029878d38..66f142bcbee4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3217,28 +3217,6 @@ static uint32_t skl_wm_method2(uint32_t pixel_rate, uint32_t pipe_htotal, return ret; } -static void skl_compute_transition_wm(struct drm_crtc *crtc, - struct skl_pipe_wm_parameters *params, - struct skl_pipe_wm *pipe_wm) -{ - /* - * For now it is suggested to use the LP0 wm val of corresponding - * plane as transition wm val. This is done while computing results. - */ - if (!params->active) - return; -} - -static uint32_t -skl_compute_linetime_wm(struct drm_crtc *crtc, struct skl_pipe_wm_parameters *p) -{ - if (!intel_crtc_active(crtc)) - return 0; - - return DIV_ROUND_UP(8 * p->pipe_htotal * 1000, p->pixel_rate); - -} - static bool skl_ddb_allocation_changed(const struct skl_ddb_allocation *new_ddb, const struct intel_crtc *intel_crtc) { @@ -3384,6 +3362,28 @@ static void skl_compute_wm_level(const struct drm_i915_private *dev_priv, &result->cursor_res_l); } +static uint32_t +skl_compute_linetime_wm(struct drm_crtc *crtc, struct skl_pipe_wm_parameters *p) +{ + if (!intel_crtc_active(crtc)) + return 0; + + return DIV_ROUND_UP(8 * p->pipe_htotal * 1000, p->pixel_rate); + +} + +static void skl_compute_transition_wm(struct drm_crtc *crtc, + struct skl_pipe_wm_parameters *params, + struct skl_pipe_wm *pipe_wm) +{ + /* + * For now it is suggested to use the LP0 wm val of corresponding + * plane as transition wm val. + */ + if (!params->active) + return; +} + static void skl_compute_pipe_wm(struct drm_crtc *crtc, struct skl_ddb_allocation *ddb, struct skl_pipe_wm_parameters *params, |