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| author | Daniel Vetter | 2012-12-14 23:38:28 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2012-12-17 15:09:49 +0100 |
| commit | 4283908ef7f11a72c3b80dd4cf026f1a86429f82 (patch) | |
| tree | 84bb3ca366578bd36b8f034dbc475080104eacb2 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: Prefer CRTC 'active' rather than 'enabled' during WM computations (diff) | |
| download | kernel-qcow2-linux-4283908ef7f11a72c3b80dd4cf026f1a86429f82.tar.gz kernel-qcow2-linux-4283908ef7f11a72c3b80dd4cf026f1a86429f82.tar.xz kernel-qcow2-linux-4283908ef7f11a72c3b80dd4cf026f1a86429f82.zip | |
drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabled
Quoting from Bspec, 3D_CHICKEN1, bit 10
This bit needs to be set always to "1", Project: DevSNB "
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 5835277d9632..3b85660ce4e4 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3592,6 +3592,10 @@ static void gen6_init_clock_gating(struct drm_device *dev) I915_READ(ILK_DISPLAY_CHICKEN2) | ILK_ELPIN_409_SELECT); + /* WaDisableHiZPlanesWhenMSAAEnabled */ + I915_WRITE(_3D_CHICKEN, + _MASKED_BIT_ENABLE(_3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB)); + I915_WRITE(WM3_LP_ILK, 0); I915_WRITE(WM2_LP_ILK, 0); I915_WRITE(WM1_LP_ILK, 0); |