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| author | Rodrigo Vivi | 2017-09-09 01:45:33 +0200 |
|---|---|---|
| committer | Rodrigo Vivi | 2017-09-19 01:08:38 +0200 |
| commit | 4cc6feb715c223d59c8cad0dc71bce1a574a2c67 (patch) | |
| tree | 7fcc5cb5256804100363f9df9ea19d5370e3f711 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: Do not enable DRRS when PSR is enabled (diff) | |
| download | kernel-qcow2-linux-4cc6feb715c223d59c8cad0dc71bce1a574a2c67.tar.gz kernel-qcow2-linux-4cc6feb715c223d59c8cad0dc71bce1a574a2c67.tar.xz kernel-qcow2-linux-4cc6feb715c223d59c8cad0dc71bce1a574a2c67.zip | |
drm/i915/cnp: Don't touch other PCH clock gating bits.
Don't touch other bits. My bad.
I haven't seen any case where those other bits appeard to be
set before we touch it, but it is safe to avoid touching
other bits we weren't told to touch.
Fixes: 0a46ddd57c9e ("drm/i915/cnp: Wa 1181: Fix Backlight issue")
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170908234534.17986-1-rodrigo.vivi@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 94624ede3479..adfeb7bb8874 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -8369,7 +8369,8 @@ static void cnp_init_clock_gating(struct drm_i915_private *dev_priv) return; /* Wa #1181 */ - I915_WRITE(SOUTH_DSPCLK_GATE_D, CNP_PWM_CGE_GATING_DISABLE); + I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) | + CNP_PWM_CGE_GATING_DISABLE); } static void cnl_init_clock_gating(struct drm_i915_private *dev_priv) |