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| author | Jesse Barnes | 2014-05-23 22:16:40 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2014-06-05 08:52:34 +0200 |
| commit | 570210598444f2b9c20db8b0e7a877633a3cb1ea (patch) | |
| tree | 21e502c7110c2fcf7b3d5d8a7e1b7d6dbd98cc0f /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: dsi: fix pipe-off timeout due to port vs. pipe disable ordering (diff) | |
| download | kernel-qcow2-linux-570210598444f2b9c20db8b0e7a877633a3cb1ea.tar.gz kernel-qcow2-linux-570210598444f2b9c20db8b0e7a877633a3cb1ea.tar.xz kernel-qcow2-linux-570210598444f2b9c20db8b0e7a877633a3cb1ea.zip | |
drm/i915/vlv: assert and de-assert sideband reset at boot and resume v3
This is a bit like the CMN reset de-assert we do in DPIO_CTL, except
that it resets the whole common lane section of the PHY. This is
required on machines where the BIOS doesn't do this for us on boot or
resume to properly re-calibrate and get the PHY ready to transmit data.
Without this patch, such machines won't resume correctly much of the time,
with the symptom being a 'port ready' timeout and/or a link training
failure.
Note that simply asserting reset at suspend and de-asserting at resume
is not sufficient, nor is simply de-asserting at boot. Both of these
cases have been tested and have still been found to have failures on
some configurations.
v2: extract simpler set_power_well function for use in reset_dpio (Imre)
move to reset_dpio (Daniel & Ville)
v3: don't reset if DPIO reset is already de-asserted (Imre)
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 7a4798f52fa1..25caf8fb6656 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -5708,10 +5708,9 @@ static bool i9xx_always_on_power_well_enabled(struct drm_i915_private *dev_priv, return true; } -static void vlv_set_power_well(struct drm_i915_private *dev_priv, - struct i915_power_well *power_well, bool enable) +void __vlv_set_power_well(struct drm_i915_private *dev_priv, + enum punit_power_well power_well_id, bool enable) { - enum punit_power_well power_well_id = power_well->data; u32 mask; u32 state; u32 ctrl; @@ -5744,6 +5743,14 @@ out: mutex_unlock(&dev_priv->rps.hw_lock); } +static void vlv_set_power_well(struct drm_i915_private *dev_priv, + struct i915_power_well *power_well, bool enable) +{ + enum punit_power_well power_well_id = power_well->data; + + __vlv_set_power_well(dev_priv, power_well_id, enable); +} + static void vlv_power_well_sync_hw(struct drm_i915_private *dev_priv, struct i915_power_well *power_well) { |