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| author | Eugeni Dodonov | 2012-07-02 16:51:08 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2012-07-05 09:56:02 +0200 |
| commit | 885094845067dd3791b0f6c3497d51bca76e393a (patch) | |
| tree | db3a0dc1eb3f4f2bdd79e2c64d929bf2d227d902 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: enable RC6 by default on Haswell (diff) | |
| download | kernel-qcow2-linux-885094845067dd3791b0f6c3497d51bca76e393a.tar.gz kernel-qcow2-linux-885094845067dd3791b0f6c3497d51bca76e393a.tar.xz kernel-qcow2-linux-885094845067dd3791b0f6c3497d51bca76e393a.zip | |
drm/i915: disable RC6 when disabling rps
We weren't disabling RC6 bits when bringing down RPS.
Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 28db512b5784..c06785ed3f43 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2305,6 +2305,7 @@ static void gen6_disable_rps(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; + I915_WRITE(GEN6_RC_CONTROL, 0); I915_WRITE(GEN6_RPNSWREQ, 1 << 31); I915_WRITE(GEN6_PMINTRMSK, 0xffffffff); I915_WRITE(GEN6_PMIER, 0); |