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| author | Mika Kuoppala | 2014-05-16 12:44:12 +0200 |
|---|---|---|
| committer | Daniel Vetter | 2014-05-16 16:28:56 +0200 |
| commit | 992f191f2c83f0d1184975a211070dff2a359d3b (patch) | |
| tree | 26b7a4e1b074501e34d83a8147e61c99fae968b2 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | drm/i915: Gracefully handle obj not bound to GGTT in is_pin_display (diff) | |
| download | kernel-qcow2-linux-992f191f2c83f0d1184975a211070dff2a359d3b.tar.gz kernel-qcow2-linux-992f191f2c83f0d1184975a211070dff2a359d3b.tar.xz kernel-qcow2-linux-992f191f2c83f0d1184975a211070dff2a359d3b.zip | |
drm/i915: Be careful with non-disp bit in PMINTRMSK
Bit 31 in GEN6_PMINTRMSK is not an interrupt disable bit with gen8.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 6e6ade902d7e..15eb29cd3ee3 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3253,7 +3253,7 @@ static void gen8_disable_rps_interrupts(struct drm_device *dev) { struct drm_i915_private *dev_priv = dev->dev_private; - I915_WRITE(GEN6_PMINTRMSK, 0xffffffff); + I915_WRITE(GEN6_PMINTRMSK, ~GEN8_PMINTR_REDIRECT_TO_NON_DISP); I915_WRITE(GEN8_GT_IER(2), I915_READ(GEN8_GT_IER(2)) & ~dev_priv->pm_rps_events); /* Complete PM interrupt masking here doesn't race with the rps work |