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authorImre Deak2014-03-04 18:23:03 +0100
committerDaniel Vetter2014-03-07 22:36:55 +0100
commitdd7c0b66e5414c54a9af8f100cc904240bab5102 (patch)
tree3a3221ba4373211a8b6640b910abc2f2cbff3a0c /drivers/gpu/drm/i915/intel_pm.c
parentdrm/i915: sanitize PUNIT register macro definitions (diff)
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drm/i915: factor out reset_vblank_counter
We need to do the same for other platforms in upcoming patches. v2: - s/p/pipe (Ville) - Call the new helper with the vbl_lock already held. The part it protects is short, so releasing it between pipes only makes proving correctness more difficult. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> [danvet: Resolve conflict with Damien's s/p/pipe/ change.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a4c0ff181d07..19591488fd2a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5310,6 +5310,13 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
}
}
+static void reset_vblank_counter(struct drm_device *dev, enum pipe pipe)
+{
+ assert_spin_locked(&dev->vbl_lock);
+
+ dev->vblank[pipe].last = 0;
+}
+
static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = dev_priv->dev;
@@ -5326,7 +5333,7 @@ static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
spin_lock_irqsave(&dev->vbl_lock, irqflags);
for_each_pipe(pipe)
if (pipe != PIPE_A)
- dev->vblank[pipe].last = 0;
+ reset_vblank_counter(dev, pipe);
spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
}