diff options
| author | Dhinakaran Pandiyan | 2018-02-23 23:15:18 +0100 |
|---|---|---|
| committer | Rodrigo Vivi | 2018-02-27 21:06:26 +0100 |
| commit | e2770e2e0509e8b1189e2471af3012d68ca511a2 (patch) | |
| tree | fb124596e0a584cfab054e53da7038ee3545a862 /drivers/gpu/drm/i915/intel_psr.c | |
| parent | drm/i915/psr: Extract PSR DPCD initialization and move it to intel_psr.c (diff) | |
| download | kernel-qcow2-linux-e2770e2e0509e8b1189e2471af3012d68ca511a2.tar.gz kernel-qcow2-linux-e2770e2e0509e8b1189e2471af3012d68ca511a2.tar.xz kernel-qcow2-linux-e2770e2e0509e8b1189e2471af3012d68ca511a2.zip | |
drm/i915/psr: Check for the specific AUX_FRAME_SYNC cap bit.
The cap check should be specifically for bit 0 instead of any bit.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Fixes: 474d1ec4a3d7 ("drm/i915/skl: Enabling PSR2 SU with frame sync")
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180223221520.18464-4-dhinakaran.pandiyan@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_psr.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_psr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c index 8f8bcffd8d49..b7cc6dd45c9e 100644 --- a/drivers/gpu/drm/i915/intel_psr.c +++ b/drivers/gpu/drm/i915/intel_psr.c @@ -144,7 +144,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp) DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP, &frame_sync_cap) != 1) frame_sync_cap = 0; - dev_priv->psr.aux_frame_sync = frame_sync_cap ? true : false; + dev_priv->psr.aux_frame_sync = frame_sync_cap & DP_AUX_FRAME_SYNC_CAP; /* PSR2 needs frame sync as well */ dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync; DRM_DEBUG_KMS("PSR2 %s on sink", |