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| author | Damien Lespiau | 2015-03-06 19:50:53 +0100 |
|---|---|---|
| committer | Daniel Vetter | 2015-03-17 22:30:08 +0100 |
| commit | 1d2b9526a790d55b7ae870934a74937081f62de2 (patch) | |
| tree | 6aea0ca61ab79112f1a1416744ecb97c7a594cdd /drivers/gpu/drm/i915/intel_runtime_pm.c | |
| parent | drm/i915: Remove unused condition in hsw_power_well_post_enable() (diff) | |
| download | kernel-qcow2-linux-1d2b9526a790d55b7ae870934a74937081f62de2.tar.gz kernel-qcow2-linux-1d2b9526a790d55b7ae870934a74937081f62de2.tar.xz kernel-qcow2-linux-1d2b9526a790d55b7ae870934a74937081f62de2.zip | |
drm/i915/skl: Restore the DDI translation tables when enabling PW1
I was dumping the DDI translation tables to make sure my patch updating
the HDMI entry was doing the right thing when I noticed that the table
was showing reset values after DPMS.
And indeed, the DDI translation registers are in power well 1 on SKL,
and so we're losing their values when shutting down eDP.
Calling intel_prepare_ddi() on PW1 enabling re-programs the table.
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_runtime_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_runtime_pm.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 8d3bad8bb104..ec3675e5ff23 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -223,8 +223,10 @@ static void skl_power_well_post_enable(struct drm_i915_private *dev_priv, 1 << PIPE_C | 1 << PIPE_B); } - if (power_well->data == SKL_DISP_PW_1) + if (power_well->data == SKL_DISP_PW_1) { + intel_prepare_ddi(dev); gen8_irq_power_well_post_enable(dev_priv, 1 << PIPE_A); + } } static void hsw_set_power_well(struct drm_i915_private *dev_priv, |