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| author | Chris Wilson | 2010-09-17 01:32:17 +0200 |
|---|---|---|
| committer | Chris Wilson | 2010-09-21 12:19:45 +0200 |
| commit | a6c45cf013a57e32ddae43dd4ac911eb4a3919fd (patch) | |
| tree | 21ce3ea9dcbeb815c92eb0a17377e5061b33151c /drivers/gpu/drm/i915/intel_sdvo.c | |
| parent | drm/i915: Cache LVDS EDID (diff) | |
| download | kernel-qcow2-linux-a6c45cf013a57e32ddae43dd4ac911eb4a3919fd.tar.gz kernel-qcow2-linux-a6c45cf013a57e32ddae43dd4ac911eb4a3919fd.tar.xz kernel-qcow2-linux-a6c45cf013a57e32ddae43dd4ac911eb4a3919fd.zip | |
drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g
Avoid confusion between i965g meaning broadwater and the gen4+ chipset
families.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index ba058e600ce7..7cd2d9592d65 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1162,7 +1162,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, return; /* Set the SDVO control regs. */ - if (IS_I965G(dev)) { + if (INTEL_INFO(dev)->gen >= 4) { sdvox = SDVO_BORDER_ENABLE; if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) sdvox |= SDVO_VSYNC_ACTIVE_HIGH; @@ -1185,7 +1185,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, if (intel_sdvo->is_hdmi) sdvox |= SDVO_AUDIO_ENABLE; - if (IS_I965G(dev)) { + if (INTEL_INFO(dev)->gen >= 4) { /* done in crtc_mode_set as the dpll_md reg must be written early */ } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) { /* done in crtc_mode_set as it lives inside the dpll register */ |