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author | Chris Wilson | 2018-07-06 16:23:22 +0200 |
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committer | Chris Wilson | 2018-07-06 18:13:17 +0200 |
commit | 5b544337109081ac4de23e7ded1c31f7457e5f5e (patch) | |
tree | cbd0129f3bebe918e70fb7d7158d8cb670039280 /drivers/gpu/drm/i915/selftests/intel_hangcheck.c | |
parent | drm/i915/selftests: Limit live_gtt allocation test to fit within RAM (diff) | |
download | kernel-qcow2-linux-5b544337109081ac4de23e7ded1c31f7457e5f5e.tar.gz kernel-qcow2-linux-5b544337109081ac4de23e7ded1c31f7457e5f5e.tar.xz kernel-qcow2-linux-5b544337109081ac4de23e7ded1c31f7457e5f5e.zip |
drm/i915/selftests: Replace magic 1<<22 with MI_USE_GGTT/MI_MEM_VIRTUAL
Replace the magic bit with the proper symbolic name for instructing
MI_STORE_DWORD_IMM to use a virtual address (on gen3) or the global GTT
address (still virtual!) on gen4+.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180706142323.25699-1-chris@chris-wilson.co.uk
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/intel_hangcheck.c')
-rw-r--r-- | drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c index 5cb808dc5b50..0fc6da81f86e 100644 --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c @@ -171,7 +171,7 @@ static int emit_recurse_batch(struct hang *h, *batch++ = MI_BATCH_BUFFER_START | 1 << 8; *batch++ = lower_32_bits(vma->node.start); } else if (INTEL_GEN(i915) >= 4) { - *batch++ = MI_STORE_DWORD_IMM_GEN4 | 1 << 22; + *batch++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT; *batch++ = 0; *batch++ = lower_32_bits(hws_address(hws, rq)); *batch++ = rq->fence.seqno; |