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| author | Chris Wilson | 2017-09-26 17:34:09 +0200 |
|---|---|---|
| committer | Chris Wilson | 2017-09-29 13:30:17 +0200 |
| commit | 60456d5c2d25cbe91cd0747d12ec9d909bf8d5b9 (patch) | |
| tree | 0a8743bf642d49df35bb7d42e1b699a2c7a4a986 /drivers/gpu/drm/i915/selftests/intel_hangcheck.c | |
| parent | drm/i915: Update DRIVER_DATE to 20170929 (diff) | |
| download | kernel-qcow2-linux-60456d5c2d25cbe91cd0747d12ec9d909bf8d5b9.tar.gz kernel-qcow2-linux-60456d5c2d25cbe91cd0747d12ec9d909bf8d5b9.tar.xz kernel-qcow2-linux-60456d5c2d25cbe91cd0747d12ec9d909bf8d5b9.zip | |
drm/i915/selftests: Replace wmb() with i915_gem_chipset_flush()
Currently, we are being fairly lazy and only using a wmb() following an
update to an active batch. Previously, we have found that to be
insufficient to ensure that a write from the CPU reaches memory in a
timely fashion, and in some caches we may need to flush a chipset cache.
To that end, we have i915_gem_chipset_flush() so use it.
Suggested-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170926153409.7928-1-chris@chris-wilson.co.uk
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/intel_hangcheck.c')
| -rw-r--r-- | drivers/gpu/drm/i915/selftests/intel_hangcheck.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c index 377c1de766ce..08159b268893 100644 --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c @@ -165,6 +165,7 @@ static int emit_recurse_batch(struct hang *h, *batch++ = lower_32_bits(vma->node.start); } *batch++ = MI_BATCH_BUFFER_END; /* not reached */ + i915_gem_chipset_flush(h->i915); flags = 0; if (INTEL_GEN(vm->i915) <= 5) @@ -231,7 +232,7 @@ static u32 hws_seqno(const struct hang *h, static void hang_fini(struct hang *h) { *h->batch = MI_BATCH_BUFFER_END; - wmb(); + i915_gem_chipset_flush(h->i915); i915_gem_object_unpin_map(h->obj); i915_gem_object_put(h->obj); @@ -275,6 +276,8 @@ static int igt_hang_sanitycheck(void *arg) i915_gem_request_get(rq); *h.batch = MI_BATCH_BUFFER_END; + i915_gem_chipset_flush(i915); + __i915_add_request(rq, true); timeout = i915_wait_request(rq, @@ -765,7 +768,7 @@ static int igt_reset_queue(void *arg) pr_info("%s: Completed %d resets\n", engine->name, count); *h.batch = MI_BATCH_BUFFER_END; - wmb(); + i915_gem_chipset_flush(i915); i915_gem_request_put(prev); } |