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| author | Chris Wilson | 2017-02-13 18:15:19 +0100 |
|---|---|---|
| committer | Chris Wilson | 2017-02-13 21:45:31 +0100 |
| commit | 0daf0113cff6884ed947ffe0870a926e73d52f79 (patch) | |
| tree | a0c55bcbb2b76fdbc4d1cd3707c622386b4d7eda /drivers/gpu/drm/i915/selftests/mock_engine.h | |
| parent | drm/i915: Mock a GGTT for self-testing (diff) | |
| download | kernel-qcow2-linux-0daf0113cff6884ed947ffe0870a926e73d52f79.tar.gz kernel-qcow2-linux-0daf0113cff6884ed947ffe0870a926e73d52f79.tar.xz kernel-qcow2-linux-0daf0113cff6884ed947ffe0870a926e73d52f79.zip | |
drm/i915: Mock infrastructure for request emission
Create a fake engine that runs requests using a timer to simulate hw.
v2: Prevent leaks of ctx->name along error paths
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170213171558.20942-8-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915/selftests/mock_engine.h')
| -rw-r--r-- | drivers/gpu/drm/i915/selftests/mock_engine.h | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/selftests/mock_engine.h b/drivers/gpu/drm/i915/selftests/mock_engine.h index 9cfe9671f860..e5e240216ba3 100644 --- a/drivers/gpu/drm/i915/selftests/mock_engine.h +++ b/drivers/gpu/drm/i915/selftests/mock_engine.h @@ -25,9 +25,25 @@ #ifndef __MOCK_ENGINE_H__ #define __MOCK_ENGINE_H__ -struct intel_engine_cs *mock_engine(const char *name); +#include <linux/list.h> +#include <linux/spinlock.h> +#include <linux/timer.h> + +#include "../intel_ringbuffer.h" + +struct mock_engine { + struct intel_engine_cs base; + + spinlock_t hw_lock; + struct list_head hw_queue; + struct timer_list hw_delay; +}; + +struct intel_engine_cs *mock_engine(struct drm_i915_private *i915, + const char *name); void mock_engine_flush(struct intel_engine_cs *engine); void mock_engine_reset(struct intel_engine_cs *engine); +void mock_engine_free(struct intel_engine_cs *engine); static inline void mock_seqno_advance(struct intel_engine_cs *engine, u32 seqno) { |